page 1 of 9 ?2002-2006 peregrine semiconductor corp. all rights reserved. document no. 70-0068-02 www.psemi.com rfc rf1 rf2 cmos control driver ctrl ctrl or v dd the pe4239 ultracmos? rf switch is designed to cover a broad range of applications from dc through 3.0 ghz. this reflective switch integrates on-board cmos control logic with a low voltage cmos-compatible control interface, and can be controlled using either single-pin or complementary control inputs. using a nominal +3-volt power supply voltage, a typical input 1 db compression point of +27 dbm can be achieved. the pe4239 ultracmos? rf switch is manufactured on peregrine?s ultracmos? process, a patented variation of silicon-on-insulator (soi) technology on a sapphire substrate, offering the performance of gaas with the economy and integration of conventional cmos. product specification spdt ultracmos? rf switch product description figure 1. functional diagram figure 2. package type sc-70 pe4239 features ? single-pin or complementary cmos logic control inputs ? +3.0-volt power supply needed for single-pin control mode ? low insertion loss: 0.7 db at 1.0 ghz, 0.9 db at 2.0 ghz ? isolation of 32 db at 1.0 ghz, 23 db at 2.0 ghz ? typical input 1 db compression point of +27 dbm ? ultra-small sc-70 package parameter conditions minimum typical maximum units operation frequency 1 dc 3000 mhz insertion loss 1000 mhz 2000 mhz 0.7 0.9 0.85 1.05 db db isolation 1000 mhz 2000 mhz 30 21 32 23 db db return loss 1000 mhz 2000 mhz 18 16 20 18 db db ?on? switching time 50% ctrl to 0.1 db of final value, 1 ghz 300 ns ?off? switching time 50% ctrl to 25 db isolation, 1 ghz 200 ns video feedthrough 2 15 mv pp input 1 db compression 2000 mhz 26 27 dbm input ip3 2000 mhz, 14 dbm input power 43 45 dbm notes: 1. device linearity will begin to degrade below 10 mhz. 2. the dc transient at the output of any port of the switch when the control voltage is switched from low to high o r high to low in a 50 ? test set-up, measured with 1ns risetime pulses and 500 mhz bandwidth. table 1. electrical specifications @ +25 c, v dd = 3 v (z s = z l = 50 ? ) 6-lead sc-70 logo updated under non-rev change. peregrine products are protected under one or more of the following u.s. patents: http://patents.psemi.com
product specification pe4239 page 2 of 9 ?2002-2006 peregrine semiconductor corp. all rights reserved. document no. 70-0068-02 ultracmos? rfic solutions table 2. pin descriptions note 1: all rf pins must be dc blocked with an external series capacitor or held at 0 v dc . figure 3. pin configuration (top view) table 3. absolute maximum ratings electrostatic discharge (esd) precautions when handling this ultracmos? device, observe the same precautions that you would use with other esd-sensitive devices. although this device contains circuitry to protect it from damage due to esd, precautions should be taken to avoid exceeding the specified rating. latch-up avoidance unlike conventional cmos devices, ultracmos? devices are immune to latch-up. table 4. dc electrical specifications pin no. pin name description 1 rf1 rf1 port (note 1) 2 gnd ground connection. traces should be physically short and connected to ground plane for best performance. 3 rf2 rf2 port (note 1) 4 ctrl switch control input, cmos logic level. 5 rfc common rf port for switch (note 1) 6 ctrl or v dd this pin supports two interface options: single-pin control mode . a nominal 3- volt supply connection is required. complementary-pin control mode . a complementary cmos control signal to ctrl is supplied to this pin. by- passing on this pin is not required in this mode. symbol parameter/conditions min max units v dd power supply voltage -0.3 4.0 v v i voltage on any input -0.3 v dd + 0.3 v t st storage temperature range -65 150 c t op operating temperature range -40 85 c p in input power (50 ? ) 30 dbm v esd esd voltage (human body model) 1500 v parameter min typ max units v dd power supply voltage 2.7 3.0 3.3 v i dd power supply current (v dd = 3v, v ctrl = 3v) 250 500 na control voltage high 0.7x v dd v control voltage low 0.3x v dd v 1 2 3 4 5 6 ctrl or v dd rfc ctrl rf1 gnd rf2 . 239 pin 1 logo updated under non-rev change. peregrine products are protected under one or more of the following u.s. patents: http://patents.psemi.com
product specification pe4239 page 3 of 9 ?2002-2006 peregrine semiconductor corp. all rights reserved. document no. 70-0068-02 www.psemi.com control voltages signal path pin 6 (ctrl or v dd ) = v dd pin 4 (ctrl) = high rfc to rf1 pin 6 (ctrl or v dd ) = v dd pin 4 (ctrl) = low rfc to rf2 table 5. single-pin control logic truth table table 6. complementary-pin control logic truth table control voltages signal path pin 6 (ctrl or v dd ) = low pin 4 (ctrl) = high rfc to rf1 pin 6 (ctrl or v dd ) = high pin 4 (ctrl) = low rfc to rf2 control logic input the pe4239 is a versatile rf cmos switch that supports two operating control modes; single-pin control mode and complementary-pin control mode. single-pin control mode enables the switch to operate with a single control pin (pin 4) supporting a +3-volt cmos logic input, and requires a dedicated +3-volt power supply connection on pin 6 (v dd ). this mode of operation reduces the number of control lines required and simplifies the switch control interface typically derived from a cmos processor i/o port . complementary-pin control mode allows the switch to operate using complementary control pins ctrl and ctrl (pins 4 & 6), that can be directly driven by +3-volt cmos logic or a suitable processor i/o port. this enables the pe4239 to be used as a potential alternate source for spdt rf switch products used in positive control voltage mode and operating within the pe4239 operating limits. logo updated under non-rev change. peregrine products are protected under one or more of the following u.s. patents: http://patents.psemi.com
product specification pe4239 page 4 of 9 ?2002-2006 peregrine semiconductor corp. all rights reserved. document no. 70-0068-02 ultracmos? rfic solutions evaluation kit the spdt switch evaluation kit board was designed to ease customer evaluation of the pe4239 spdt switch. the rf common port is connected through a 50 ? transmission line to the top left sma connector, j1. port 1 and port 2 are connected through 50 ? transmission lines to the top two sma connectors on the right side of the board, j3 and j2, respectively. a through transmission line connects sma connectors j4 and j5. this transmission line can be used to estimate the loss of the pcb over the environmental conditions being evaluated. the board is constructed of a two metal layer fr4 material with a total thickness of 0.031?. the bottom layer provides ground for the rf transmission lines. the transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 0.0476?, trace gaps of 0.030?, dielectric thickness of 0.028?, metal thickness of 0.0021? and r of 4.4. j6 provides a means for controlling dc and digital inputs to the device. starting from the lower left pin, the second pin to the right (j6-3) is connected to the device v1 or ctrl input. the fourth pin to the right (j6-7) is connected to the device v2 or ctrl/v dd input. figure 4. evaluation board layout figure 5. evaluation board schematic peregrine specification 102/0104 peregrine specification 101/0083 logo updated under non-rev change. peregrine products are protected under one or more of the following u.s. patents: http://patents.psemi.com
product specification pe4239 page 5 of 9 ?2002-2006 peregrine semiconductor corp. all rights reserved. document no. 70-0068-02 www.psemi.com 20 30 40 50 60 20 30 40 50 60 0 500 1000 1500 2000 2500 3000 iip3 (dbm) 1db compression point (dbm) frequency (mhz) typical performance data @ -40 c to 85 c (unless otherwise noted) figure 7. input 1 db compression point & iip3 (typical performance @ 25 c) figure 9. isolation ? rfc to rf1 figure 8. insertion loss ? rfc to rf2 figure 6. insertion loss ? rfc to rf1 -1.5 -1.2 -0.9 -0.6 -0.3 0 0 500 1000 1500 2000 2500 3000 insertion loss (db) frequency (mhz) insertion loss (db) -40c 25c 85c -100 -80 -60 -40 -20 0 0 500 1000 1500 2000 2500 3000 isolation (db) frequency (mhz) -1.5 -1.2 -0.9 -0.6 -0.3 0 0 500 1000 1500 2000 2500 3000 insertion loss (db) frequency (mhz) insertion loss (db) -40c 25c 85c logo updated under non-rev change. peregrine products are protected under one or more of the following u.s. patents: http://patents.psemi.com
product specification pe4239 page 6 of 9 ?2002-2006 peregrine semiconductor corp. all rights reserved. document no. 70-0068-02 ultracmos? rfic solutions -100 -80 -60 -40 -20 0 0 500 1000 1500 2000 2500 3000 isolation (db) frequency (mhz) -100 -80 -60 -40 -20 0 0 500 1000 1500 2000 2500 3000 isolation (db) frequency (mhz) figure 11. isolation ? rf1 to rf2, rf2 to rf1 figure 13. return loss ? rf1, rf2 figure 12. return loss ? rfc to rf1, rf2 figure 10. isolation ? rfc to rf2 typical performance data @ -40 c to 85 c (unless otherwise noted) -40 -30 -20 -10 0 0 500 1000 1500 2000 2500 3000 return loss (db) frequency (mhz) rf2 rf1 -40 -30 -20 -10 0 0 500 1000 1500 2000 2500 3000 return loss (db) frequency (mhz) rf2 rf1 logo updated under non-rev change. peregrine products are protected under one or more of the following u.s. patents: http://patents.psemi.com
product specification pe4239 page 7 of 9 ?2002-2006 peregrine semiconductor corp. all rights reserved. document no. 70-0068-02 www.psemi.com figure 14. package drawing 6-lead sc-70 1.80 2.20 0.65 bsc 1.80 2.40 1.15 1.35 0.15 0.30 0.80 1.10 0.80 1.00 0.10 0.30 0.10 0.40 0.10 0.18 0.00 0.10 logo updated under non-rev change. peregrine products are protected under one or more of the following u.s. patents: http://patents.psemi.com
product specification pe4239 page 8 of 9 ?2002-2006 peregrine semiconductor corp. all rights reserved. document no. 70-0068-02 ultracmos? rfic solutions table 7. ordering information order code part marking description package shipping method 4239-01 239 pe4239-06sc70-7680a 6-lead sc-70 7680 units / canister 4239-02 239 pe4239-06sc70-3000c 6-lead sc-70 3000 units / t&r 4239-00 pe4239-ek pe4239-06sc70-ek evaluation kit 1 / box 4239-51 239 pe4239g-06sc70-7680a green 6-lead sc-70 7680 units / canister 4239-52 239 pe4239g-06sc70-3000c green 6-lead sc-70 3000 units / t&r figure 15. tape and reel specifications pin 1 tape feed direction logo updated under non-rev change. peregrine products are protected under one or more of the following u.s. patents: http://patents.psemi.com
product specification pe4239 page 9 of 9 ?2002-2006 peregrine semiconductor corp. all rights reserved. document no. 70-0068-02 www.psemi.com sales offices the americas peregrine semiconductor corporation 9450 carroll park drive san diego, ca 92121 tel: 858-731-9400 fax: 858-731-9499 north asia pacific peregrine semiconductor k.k. teikoku hotel tower 10b-6 1-1-1 uchisaiwai-cho, chiyoda-ku tokyo 100-0011 japan tel: +81-3-3502-5211 fax: +81-3-3502-5213 peregrine semiconductor, korea #b-2402, kolon tripolis, #210 geumgok-dong, bundang-gu, seongnam-si gyeonggi-do, 463-480 s. korea tel: +82-31-728-4300 fax: +82-31-728-4305 europe peregrine semiconductor europe batiment maine 13-15 rue des quatre vents f-92380 garches, france tel: +33-1-4741-9173 fax : +33-1-4741-9173 for a list of representatives in your area, please refer to our web site at: www.psemi.com data sheet identification advance information the product is in a formative or design stage. the data sheet contains design target specifications for product development. specifications and features may change in any manner without notice. preliminary specification the data sheet contains preliminary data. additional data may be added at a later date. peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. product specification the data sheet contains final data. in the event peregrine decides to change the specifications, peregrine will notify customers of the intende d changes by issuing a dcn (document change notice). the information in this data sheet is believed to be reliable. however, peregrine assumes no liability for the use of this information. use shall be entirely at the user?s own risk. no patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. peregrine?s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the peregrine product could create a situation in which personal injury or death might occur. peregrine assumes no liabilit y for damages, including consequential or incidental damages, arising out of the use of its products in such applications. the peregrine name, logo, and utsi are registered trademarks and ultracmos and harp are trademarks of peregrine semiconductor corp. south asia pacific peregrine semiconductor, china shanghai, 200040, p.r. china tel: +86-21-5836-8276 fax: +86-21-5836-7652 space and defense products americas: tel: 858-731-9453 europe, asia pacific: 180 rue jean de guiramand 13852 aix-en-provence cedex 3, france tel: +33-4-4239-3361 fax: +33-4-4239-7227 logo updated under non-rev change. peregrine products are protected under one or more of the following u.s. patents: http://patents.psemi.com
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